8085 Microprocessor: De-multiplexing of AD0-AD7 Address and Data Lines

 De-multiplexing of AD0-AD7 of 8085 Microprocessor

THE ADDRESS AND DATA BUSES:

• 8085 Microprocessor have total 16 address lines and 8 data lines.
• 8 signal lines A8 – A15 which are unidirectional. • The other 8 address bits are multiplexed with the 8 data bits. So, the bits AD0 – AD7 are

bi-directional and serve as A0 – A7 (address bus) and D0 – D7 (data bus) at the same time.

• During the execution of the instruction, these lines carry the address bits during the early

part, then during the late parts of the execution, they carry the 8 data bits. In order to

separate the address from the data, we can use a latch to save the value before the function

of the bits changes.

THE CONTROL AND STATUS SIGNALS: • There are 4 main control and status signals.

1. ALE (Address Latch Enable):

This signal is a pulse that become 1 when the AD0 –AD7 lines have an address on them. It

becomes 0 after that. This signal can be used to enable a latch to save the address bits from

the AD lines.

2. RD (Read):

When it is active low then microprocessor reads the instructions. 3. WR (Write):

When it is active low then microprocessor writes the instructions. 4. IO/M:

This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O operation (IO/M=1). 5. S1 and S0:

Status signals to specify the kind of operation being performed. 

DE-MULTIPLEXING OF AD0-AD7 OF 8085 MICROPROCESSOR: • The AD7– AD0 lines are serving a dual purpose and that they need to be de-multiplexed

to get all the information. • The high order bits of the address remain on the bus for three clock periods. However, the low order bits remain for only one clock period and they would be lost if they are not saved externally. • To make sure we have the entire address for the full three clock cycles, we will use an external latch to save the value of AD7– AD0 when it is carrying the address bits. We use the ALE signal to enable this latch. • ALE operates as a pulse during T1, we will be able to latch the address. Then when ALE goes low, the address is saved and the AD7– AD0 lines can be used as the bi-directional data lines.

GENERATING CONTROL SIGNALS:

• The 8085 generates a RD & WR signals. However, the signal needs to be used with

both memory and I/O device. So, it must be combined with the IO/M signal to generate

different control signals for the memory and I/O device. • The following circuitry can be used to generate these signals:

• The following circuitry will show De-multiplexing of AD0-AD7 and Generating control

signals:

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